Job ID: JR0063491
Job Category: Engineering
Primary Location: Hillsboro, OR US
Job Type: Experienced Hire
Core IP Structural Design Engineer
As a synthesis expert for our CPU design team, your responsibilities include:
- Developing a synthesis and place and route strategy to meet the challenges of a large-scope, high-frequency, area and power efficient design project.Establishing synthesis and place and route design guidelines and BKMs for the RTL team
- Defining criteria for synthesis execution milestones and enabling the team to achieve them.Influencing program direction with technical proposals, analysis and recommendations
- Leading and mentoring junior technical staff members
As an ideal candidate you exhibit behavioral traits that indicate your:
- Ability to use sound methods and data to test new ideas as well as the desire to have your own ideas be challenged by others
- Willingness to work with others in a highly complex decision space rife with ambiguity
- Ability to develop an implementation plan, monitor key indicators, and adjust resources and scope to deliver value on schedule
- Motivation to teach and mentor junior team members to become the rock-stars of tomorrow
- Propensity to thrive in a fast-paced, startup-like environment.
- Strong verbal and written communication and collaboration skills
- Bachelors in Computer Engineering or Electrical Engineering with 6+ years of relevant work experience or M.S. in Computer Engineering or Electrical Engineering with 4+ years of relevant work experience
Demonstrated success in one or more of the following areas:
- Expert level knowledge of synthesis and PnR methods
- Experience leading synthesis work flows on one or more projects
- Experience manipulating RTL for synthesis friendly designs
- Experience with high speed timing, area and power efficient design and analysis
- Knowledge of various circuit design styles, including synthesis, custom datapath, and memory RF
- A past technical leadership role including mentoring and schedule tracking
- Strong software foundation and hands on experience in scripting in an interpreted language e.g. TCL, Perl, Python, Ruby
- Work experience in Intel CPU or other high speed microprocessor design
- Design of high-speed logic blocks across a variety of design styles datapath, register file, synthesis
- Research publications, patent filings, or other evidence of personal technical innovation in CPU/Microprocessor design
Inside this Business Group
The Core and Visual Computing Group (CVCG) is responsible for the architecture, design and development of the CPU core and visual technology IPs that are central to Intel's system-on-a-chip (SoC) products and key to our datacenter, client and Internet-of-Things (IOT) platforms. CVCG strives to lead the industry through continuous innovation and world class engineering.
Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
Entry Level Tool Install Architectural Designer - (BIA0004KJ) Description Support design of High Tech Manufacturing Facilities across the globe and have a hand in transforming tomorrow. As a Tool...
Senior Instrumentation & Controls Engineer - (BIA0004BS) Description As a Senior Instrument & Controls Engineer, you’ll have the chance to deliver cutting-edge automation services to our clients....
Mid-Level Instrumentation & Controls Engineer - (BIA0004BQ) Description As an Instrumentation and Controls Engineer, you have a chance to help deliver cutting edge automation services to our...
Junior Tool Install Structural Engineer - Advanced Facilities - (BIA0004KK) Description Provide Structural Engineering services in the electronics industrial field through structural analysis,...
ID 2185 - Executive Director of Project Management 1.0 FTE for 261 days per year, Lake Oswego School District, 15 daysExecutive Director of Project Management 1.0 FTE for 261 days per year $135,260 - $140,564 per year (based on experience) Purpose: To effectively and efficiently administer the District’s...
Senior Life Safety and Security Designer - (BIA000463) Description Support designing High Tech manufacturing facilities across the globe and have a hand in transforming tomorrow. As a Life Safety...
Entry Level Tool Install Architectural Designer - (BIA0004KJ) Description Support design of High...
Senior Instrumentation & Controls Engineer - (BIA0004BS) Description As a Senior Instrument &...
Mid-Level Instrumentation & Controls Engineer - (BIA0004BQ) Description As an Instrumentation...
Junior Tool Install Structural Engineer - Advanced Facilities - (BIA0004KK) Description Provide...
ID 2185 - Executive Director of Project Management 1.0 FTE for 261 days per year, Lake Oswego School District, 15 daysExecutive Director of Project Management 1.0 FTE for 261 days per year $135,260 - $140,564 per...
Senior Life Safety and Security Designer - (BIA000463) Description Support designing High Tech...